1. Field of the Invention
The invention pertains to the field of active addressed displays, and more particularly to addressing circuitry which permits relatively long switching times for vertical source line switches, permitting the use of relatively small TFT's on the display substrate for this switching.
2. Description of the Prior Art
Active addressed TV displays normally employ a plurality of display units, each of which may be a liquid crystal cell, arranged in a matrix of N horizontal rows and M vertical columns. The display units are addressed by an addressing circuit which sequentially samples a video scan line to store pixels of video information in storage capacitors associated with source lines coupled to the display elements in the M vertical columns. Source line switches coupled to the source line storage elements are cycled by a horizontal switch activating generator, normally a shift register having M stages. The source line switches are turned on and off sequentially to transfer the pixel information to storage elements connected to the source lines of the display. The switching time required for pixel information storage is equal to 1/M times the horizontal scan time. At the conclusion of a horizontal scan, a vertical switch activating generator, normally a shift register of N stages, simultaneously activates a row of switches corresponding to the horizontal scan line to transfer the stored pixel information to a row of display elements. Thus, each row of pixel switching elements is cycled once during a frame interval, and every display element is addressed during a frame period.
The time available to charge a vertical source line storage capacitor, as indicated above, is determined by the horizontal scan time divided by the number of pixel elements along the horizontal scan line. The switching time is about 100 nanoseconds for the standard NTSC line scan time and 640 pixel (resolution) elements along a scan line.
In order to reduce the size and cost of active address displays, it is desirable to integrate the addressing circuitry onto the substrate of the display using the same type of thin film transistors that are used to transfer the pixel information into the display elements. This arrangement greatly reduces the number of interconnections that are required when the addressing circuitry is located external to the substrate containing the display elements. Thin film transistors have low charge carrier mobility and consequently have high ON resistance for a given transistor area, thereby establishing long time constants for charging the storage capacitors. In the matrix arrangement of an active addressed array, thin film transistors capable of transferring the required charge into the source line storage capacitors in 100 nanoseconds or less would need a high channel width to length ratio and therefore would occupy a relatively large area on the substrate. These large area transistors also exhibit low production yields and relatively low operational reliability.
It is therefore an object of this invention to provide an active addressed display utilizing small, relatively long switching time, thin film transistors integrated on the display substrate while providing a video display without degradation.